1. Field of the Invention
This invention relates to a semiconductor device, and more particularly to a high-barrier gate and tri-step doped channel field-effect transistor
2. Description of Prior Art
Recently, many semiconductor devices with the very thin and sharply doped layer have been developed because of the advancement of film growth techniques, such as MOCVD and MBE and so on. Among them, the Ga.sub.0.51 In.sub.0.49 P epitaxial layer lattices matched to GaAs have been received much attention. GaInP material has the advantages of (1) lower deep level trap; (2) highly selective etch ration between GaInP and GaAs materials; (3) large break down voltage; (4) larger valance band discontinuity between GaInP and GaAs materials; (5) the elimination of DX centers and thermal oxidation as compared to AlGaAs. Therefore, GaInP/GaAs heterostructure has been widely used in high speed and microwave devices, such as heterojunction bipolar transistors (HBT) or heterojunction field-effect transistors (HFET), etc.